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The Applications Engineer (AE) will provide technical customer support for Cadence Emulation and Simulation Acceleration Verification products. Applying electronic design expertise across multiple products within the System Level Design and Verification Platform will be the primary activity. In this role, the Application Engineer will be expected to work both independently and in collaboration with other team members to address customer issues and to support technology adoption campaigns. Linked to these activities, the AE will liaise with R&D groups to develop and introduce new solutions for electronic system design. The AE will be expected to mature into a strong team member and key contributor, leading team projects and initiatives.
Key Accountabilities:

1. Provide direct technical pre-sales support for Cadence Verification Emulation products, in the context of a strong technical understanding of the complete verification flow
2. Manage strategic customer evaluations/benchmarks on Cadence verification solutions to establish technology differentiation and assert Cadence competitive advantages
3. Assist customers in adopting Cadence technology by providing Verification methodology and tool knowledge to design and verification engineers, validated through successful implementation.
4. Drive best practices and lessons learned from delivering training, benchmarks and customer interactions back in to product development and Cadence field engineers; build understanding of the customer’s needs and also of the competition’s technology and sales strategies.
5. Perform methodology assessments, improve existing design methodologies and develop new ones that leverage Cadence technology and services

The candidate should be able to:
1. Provide direct technical support for Cadence CVA products to customer base, primary responsibility in Grenoble (France), Sophia (France) and Lund (Sweden)).
2. Deliver Educational Services training courses covering Emulation & Simulation Acceleration Verification Platform core technologies.
3. Manage strategic customer evaluations / benchmarks on Cadence HW assisted verification core technologies.
4. Assist customers with adopting Cadence technology by providing design methodology and tool knowledge in the HW Verification process.
5. Drive best practices and lessons learned from evaluations / benchmarks and customer interactions back in to Cadence product development.
6. Provide an understanding of customer needs and competitive capabilities and strategies to Cadence field organisations.
7. Perform methodology assessments, improve existing design techniques and develop new approaches that leverage Cadence technology and service offerings.
8. Show leadership skills as part of an on-going development plan.
. The person must be able to act as strong team member and contributor, leading projects and initiatives for the local regions and maintain a strong connection with the US team.
10. Expertise in RTL top-down design and verification methodology automation are required. This includes full hands on knowledge of writing and debugging Verilog, VHDL and SystemVerilog based D&V environments.
11. The successful candidate should have a good knowledge of SoC design principles, embedded software development and HW/SW co-design and co-verification.
12. The successful candidate should possess team-success orientation, mature work attitude, and good judgment under pressure.

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